PCIe Index Page
PCIe 枚举示例（Single Root）_secondary bus numbe_码农老王(JN)的博客-CSDN博客
PCI Express: An Overview | Ars Technica
PCIE Bus Interface Chip CH368 - NanjingQinhengMicroelectronics
What is PCIE enumeration? - Quora
Why Are PCIe SSDs So Fast? - Stephen Foskett, Pack Rat
2. PCI Express Bus
How PCI Express Works | HowStuffWorks
Determine the Number and Range of PCI/PCIe Root Bus Devices - NI
How modern multi-processor multi-Root Complex system assigns PCI bus number | CodyWu's Blog
The Inner Workings of PCI Express | TechSpot
How to Distinguish PCI Vs PCI Express?
Peripheral Component Interconnect - Wikipedia
What are PCIe Lanes and Why Do They Matter? - Velocity Micro Blog
PCI Express is Taking Over - Crystal Group
Root complex - Wikipedia
PCIe bus layers architecture established between a host and a target... | Download Scientific Diagram
How modern multi-processor multi-Root Complex system assigns PCI bus number | CodyWu's Blog
Introduction to PCIe – Systems Research
Plug-And-Play Configuration of Routing Options | Address Spaces & Transaction Routing | InformIT
Introduction to PCI Express - What is PCIe Bus? - NI
What limits the number of buses, devices and functions on a PCI bus? - Electrical Engineering Stack Exchange
How PCI Express Works | HowStuffWorks
PCIE Bus Interface Chip CH368 Development Board Evaluation Learning Board | eBay
Synopsys IP Technical Bulletin: PCI Express Switch Enumeration Using VMM-Based DesignWare Verification IP
Assigning PCIe Buses - Oracle VM Server for SPARC 3.0 Administration Guide
